Computer Architecture

Title Computer Architecture (52010)
Quarter Winter 2020
Instructor Andrew Siegel (siegela@uchicago.edu)
Website

Syllabus

Textbook: Hennessey and Patterson, "Computer Architecture: A Quantitative Approach", 5th Edition preferred

This course focuses on the design and performance evaluation of modern computer architectures. The emphasis is on microprocessors, chip-multiprocessors and memory hierarchy design, including parallel (multicore) CPUs.

  • Topics include:

  • Memory cache designs and optimizations

  • DRAM technologies

  • Instruction and data pipelining

  • Branch prediction for instruction- and data-level paralelism

  • Dynamic scheduling for instruction- and data-level parallelism

  • Mulithreading support in hardware and operating system

  • Data coherency for efficient multithreading

  • Non-uniform memory access for efficient multithreading 

Prerequisites (Courses)

Core Programming

Prerequisites (Other)

Satisfies

Core Systems

Time

Monday 5:30-8:30pm

Location

JCL 011